1. Field of the Invention
The present invention relates to a display device such as a liquid crystal display (LCD) device, a plasma display panel (PDP), an inorganic or organic electroluminescent (EL) display device, a light emitting diode (LED) display device, a fluorescent display tube, an electric field emission display device, an electrophoretic display device, and an electrochromic display device.
2. Description of the Prior Art
A color LCD using a thin film transistor (TFT) is one of active matrix driven LCDs. A color LCD includes a TFT substrate as an active matrix substrate, a counter substrate disposed so as to be opposed to the TFT substrate and including a common electrode and a liquid crystal layer interposed between the substrates. The TFT substrate includes TFTs provided so that each of the TFTs is located in the vicinity of an intersection point of each of gate lines and an associated one of source lines and pixel electrodes connected to the TFTs, respectively. Red (R), green (G) and blue (B) color filters are disposed so that each color filter corresponds to each pixel electrode, whereby each pixel is formed. Pixels are disposed, for example, in a delta arrangement disclosed in U.S. Pat. No. 5,144,288. U.S. Pat. No. 5,144,288 is hereby incorporated by reference.
FIG. 1 is a plan view schematically illustrating a TFT substrate of an LCD including pixels disposed in a delta arrangement. On a display section 1 of the TFT substrate, gate lines 4 each extending from a gate driver 2 and source lines 5 each extending from a source driver 3 are formed. TFTs 6 are provided so that each of the TFTs 6 is located in the vicinity of an intersection point of each of the gate lines 4 and each of the source lines 5, and pixel electrodes 7 are connected to TFTs 6, respectively. A signal corresponding to each of the pixel electrodes 7 is supplied to the pixel electrode 7 through an associated one of the TFTs 6. Thus, a voltage is applied between each of the pixel electrodes 7 and a common electrode (not shown), so that the optical property of a liquid crystal layer corresponding to a region of each pixel is controlled and a display is performed.
In the TFT substrate of FIG. 1, the gate lines 4 linearly extend in the row direction whereas the source lines 5 extend in a zigzag manner in the column direction. Moreover, the pixel electrodes 7 to which signals are supplied from the same source line 5 are disposed left and right alternatively between adjacent rows, i.e., in a staggered pattern, with respect to each of the source lines 5.
On the other hand, to increase an aperture ratio of each pixel, an LCD with a high aperture ratio in which each source line is covered with an insulation film and each pixel electrode is formed on the insulation film has been developed. However, for example, with the LCD with a high aperture ratio using a delta arrangement, the following problem arises.
FIG. 2 is a plan view schematically illustrating a capacitance between each source line and each pixel electrode in a delta arrangement panel of FIG. 1. As shown in FIG. 2, seen from the top, each of the pixels 7 is interposed between adjacent ones of the source lines 5 in the row direction. For example, in FIG. 2, each of green pixels 7G1 in the first row and green pixels 7G3 in the third row is interposed between an associated one of green pixel source lines 5G for inputting image signals PS to the green pixels 7G and an associated one of blue pixel source lines 5B for inputting image signals PS to blue pixels 7B each of which is located adjacent to the associated one of green pixels 7G in the row direction.
On the other hand, in FIG. 2, each of green pixels 7G2 in a second row and green pixels 7G4 in a fourth row is interposed between an associated one of the green source lines 5G and an associated one of red pixel source lines 5R for inputting image signals PS to red pixels 7R each of which is located adjacent to the associated green pixels 7G in the row direction. In other words, the green pixels 7G1 and 7G3 each being interposed between an associated one of the green pixel source lines 5G and an associated one of the blue pixel source lines 5B and the green pixels 7G2 and 7G4 each being interposed between an associated one of the green pixel source lines 5G and an associated one of the red pixel source lines 5R are arranged alternately between rows. That is, green pixels 7G, each of which is interposed between ones of the source lines 5 of two types located adjacent to each other in the row direction, are arranged so that each of the green pixels 7G appears every second rows. That is, between two rows, green pixels 7G of two types, each of which interposed between different two of the source lines 5, are alternately arranged.
FIG. 3 is an enlarged view partially illustrating the pixel arrangement with one of the green pixels 7G2 in the second row in FIG. 2 being centered. FIG. 4 is a cross-sectional view schematically illustrating a cross section taken along the line A-B of FIG. 3. FIG. 5 is a cross-sectional view schematically illustrating a cross section taken along the line C-D of FIG. 3. As shown in FIGS. 4 and 5, the pixel electrodes 7 and the source lines 5 are disposed with an insulation film 8 interposed therebetween, so that a source-drain capacitance, i.e., a parasitic capacitance exists therebetween. A parasitic capacitance between one of the pixel electrodes 7 and an associated one of the source lines 5 for inputting an image signal PS to the pixel electrode 7 (in other words, one of the source lines 5 which drives the pixel electrode 7) is assumed to be a capacitance Csd1 and a parasitic capacitance between another one of the pixel electrodes 7 and an associated one of the source lines 5 which does not input an image signal PS to the pixel electrode 7 (in other words, one of the source lines 5 which does not drive the pixel electrode 7) is assumed to be a capacitance Csd2. For example, the capacitance Csd1 exists between the red pixel source line 5R and the red pixel 7R and the capacitance Csd2 exists between the red source line 5R and the green pixel 7G or the blue pixel 7B. The potential of the source line 5R is changed due to the capacitances Csd1 and Csd2 and this change influences the potential of the pixel electrode 7. For example, the potential of the green pixel 7G2 located in the second row and interposed between the red pixel source line 5R and the green pixel source line 5G is influenced by the source lines 5R and 5G, and the green pixel 7G1 located in the first row and interposed between the green pixel source line 5G and the blue pixel source line 5B is influenced by the source lines 5G and 5B. Therefore, the potential Vpix of an influenced pixel electrode (e.g., the green pixel 7G) can be expressed by the following equation:Vpix=Vsl 0+(Csd 1/Cpix)×ΔVsl 1+(Csd 2/Cpix)×ΔVsl 2where Vsl 0 is a potential before the potential is influenced (i.e., a potential applied from the source line 5G to the green pixel 7G via a TFT for inputting an image signal), ΔVsl 1 is a voltage amplitude of the source line 5G for inputting an image signal to the green pixel 7G, ΔVsl 2 is a voltage amplitude of the source line 5R or 5B which does not input an image signal to the green pixel 7G, and Cpix is the sum of capacitances (such as parasitic capacitance, auxiliary capacitance and the like) applied to the green pixel 7G.
FIG. 6 is a plan view illustrating influences of the source lines 5 to the potential of the pixel electrodes 7G. In FIG. 6, the potential of the green pixel 7G1 in an upper row is influenced by the red pixel source line 5R and the green pixel source line 5G, and the potential of the green pixel 7G2 in a lower row is influenced by the green pixel source line 5G and the blue pixel source line 5B. Thus, the respective potentials of the green pixel 7G1 in the upper row and the green pixel 7G2 in the lower row are equal to each other. However, a potential influenced by the red pixel source line 5R and a potential influenced by the blue pixel source line 5B are not always the same and thus the influenced potentials in the green pixel 7G1 in the upper row and the green pixel 7G2 in the lower row might be different from each other. That is, a voltage applied to the green pixels 7G might be different between rows. In this case, luminance difference among pixels in different rows appears as horizontal stripes, so that a uniform display can not be achieved. For example, when the red pixel 7G is in a white display state (i.e., a state where a transmittance is the highest), the green pixel 7G is in a half-tone presentation state, and the blue pixel 7B is in a black display state (i.e., a state where a transmittance is the lowest), horizontal stripes markedly appear.
This phenomenon occurs not only to the green pixel 7G but also to the red pixel 7R or the blue pixel 7B. Moreover, this phenomenon may also occur not only in a delta arrangement but also in a mosaic arrangement or a square arrangement.